1. Field of the Invention
The present invention relates to components for testing of semiconductor devices, and more particularly to fiducial alignment marks on microelectronic contacts for use on probe cards, contactors, and similar components.
2. Description of Related Art
Testing of semiconductor devices, particularly wafer-level testing done prior to singulation of semiconductor devices from a wafer, is frequently performed using a component, such as a contactor assembly having a plurality of microelectronic contacts, each of which contacts a terminal pad, solder ball, or other such terminal on the wafer. Because of the very fine pitch at which the terminals on the wafer are disposed, and the correspondingly small scale of the microelectronic contact structures, alignment of contacts and the terminals on the wafer is accomplished with the help of special alignment machines and methods.
According to one prior art alignment method, at least three alignment marks (sometimes called “fiducial” alignment marks) are placed on the wafer at an earlier device manufacturing stage. The position of these marks is known with a high degree of accuracy relative to the terminals or contact pads on the wafer. On the contactor, comparably accurate alignment marks are not present. This has limited the accuracy with which certain types of contactors, such as those with tungsten wire contact elements, can be placed. Tungsten wire contacts cannot be placed on the contactor with a high degree of accuracy, and hence cannot be maintained in registration with marks on the contactor. However, certain other types of contactors, such as contactors with composite contacts having lithographically placed contact tip structures as disclosed, for example, in U.S. Pat. No. 5,864,946 (Eldridge et al.), may be provided with a plurality of very accurately positioned spring contact tips.
Generally, to be useful as an alignment mark, a mark must be positioned with an accuracy that is at least one-half the finest pitch (spacing) between adjacent terminals on the wafer. That is, the position of the alignment mark must be known with certainty to be within a sphere having a diameter no greater than one-half of the pitch of the terminals on the semiconductor device. For memory devices, many of which have a pitch of about 80 micrometers (3.2 mil), an accuracy of at least about 40 micrometers (1.6 mil) is accordingly required. Because they are formed during the same lithographic steps used to create electronic features on the wafer, wafer alignment marks can be disposed on the wafer with the required accuracy. Lithographically placed contact tips on some types of contactors are also capable of being disposed on the contactor with comparable accuracy.
According to the prior art alignment method, three or more of these lithographically placed contact tips are selected to serve the function of alignment marks during a subsequent positioning step. Typically, a relatively small flat area on the distal end of the contact tips is used as a visual target. These flat areas are relatively easy to see and distinguish using commonly used vision systems. Using the alignment marks on the wafer and the selected contact tips on the contactor as reference points, the wafer and contactor are then positioned relative to one another so that each of the contact tips on the contactor can make contact with a corresponding terminal on the wafer. Using this method, it is possible to make contact with an array of terminals disposed at a very fine pitch.
Although the foregoing alignment method represents advancement over older methods in that it permits alignment with terminals disposed at pitches down to about 40 micrometers, it suffers from certain limitations. One limitation is related to the use of spring contact tips for alignment of the contactor. During repeated applications of the contactor, such contact tips can become contaminated with debris (such as metal oxides or organic residue) from terminals on the wafers under test. Such debris normally does not interfere with the electrical operation of the contactor, but can make it difficult to locate the selected contact tips with the requisite degree of accuracy. The target areas on the contact tips may become obscured or difficult to see. As even finer pitches for terminals on semiconductors are tested, and the size of contact tips shrinks accordingly, this limitation of the prior art method becomes increasingly apparent and costly to overcome. It is desired, therefore, to provide an apparatus and method that overcomes the limitations of the prior art method and yet is compatible with the installed base of vision and positioning systems.